Digital control of an uninterruptible power supply (UPS)
using an ASIC
Uninterruptible power supply systems (UPS) are necessary for all applications where electronic systems have to work also in case of power failure (i.e. computer centers,
hospital equipment, communication equipment etc.). Many mainframe computers are fed by UPS systems.
UPS systems conventionally consist of a synchronous generator, a fly-wheel for short-time energy storage and a battery powered motor
or diesel engine.
By progress in power electronics static power converters can be realized, especially for mid-range output power (i.e. 5 - 50 kVA). In recent times there is increasing demand for UPS systems with low-distortion
output voltages and sinusoidal input currents. Even at non-linear loads producing output currents with high harmonic content, sinusoidal output voltage is required. Due to this, even at unsymmetrical loads a static inverter can be better
than rotating converters.
On this background the Anton Piller GmbH & Co. KG asked the IAM GmbH to design a high performance digital control together with an application specific integrated circuit (ASIC) containing the new
Static UPS System Hardware
systems consist of a rectifier with a single or three-phase mains connection, a DC-link with a battery for power storage and a single- or three-phase Output converter. The bypass serves as an energy link in times of system failure or
overload situations (Fig. 1).
Fig. 1: Static UPS system APOSTAT
The rectifier and inverter contain fast power devices (MOSFET or IGBT) capable of switching frequencies of 10-20 kHz. This UPS
system is completely digitally controlled. All fast control loops are implemented within the ASIC. Slow control and monitoring is done by a microcontroller.
A simple diode rectifier generates line currents with not satisfying harmonics. Power supply companies are preparing regulations for the
current distortion of power equipment. Therefore a controlled rectifier with pure resistive sinusoidal input currents was chosen for the UPS system.
The mains rectifier is a four-quadrant, three-phase inverter using fast switching power transistors. Modified main circuits can be
chosen for one-quadrant or single-phase applications. In this configuration the dc-link voltage is higher than the normally rectified line
voltage. The rectifier inverter operates as a three-phase step-up-chopper. For decreased DC voltages an additional auto transformer can be used.
The control scheme is shown in Fig. 2. Controlled quantities are the DC-link voltage and the phase currents. Pl-algorithms are used for
the current loop. The reference is made up of an amplitude calculated by the DC-voltage regulator multiplied with the sine functions of the mains phase angle.
To generate the sine values a PLL-algorithm is implemented. Regulating the DC-link voltage has two conflicting goals: to achieve a
stable DC-link voltage and to produce sinusoidal input currents. Especially in single-phase application and with unsymmetrical inverter
loads the DC-link voltage has to vary to achieve power storage in the DC-link capacitor. Therefore the DC-control consists of two
independent control circuits: a fast PI-controller normally working at its upper limit is responsible for avoiding over voltage; by a slower
combination of battery current controller and battery voltage controller a well-filtered operation is achieved.
Fig. 2: Control scheme of mains rectifier
Since output loads are not symmetrical, every output inverter is made up of four power switches building a four-quadrant converter
feeding the output transformer. The stray filters the output voltage Inductance of the specially-designed transformer and the output capacitance.
The control scheme of the output inverter is shown in Fig. 3. The Controlled quantity is the output voltage. An underlying current
control loop is implemented for protection of the power devices. The output value is transformed to switching signals by pulse width modulation (PWM).
PI-controllers for AC quantities normally have phase and amplitude errors, which are not tolerable. On the other hand, PI-controllers
provide predictable behavior at all operating modes. To reduce undesired effects feed-forward signals from the reference and output
voltage are used. To eliminate the influence of the changing DC link voltage on the gain of the current controller the current control output is multiplied with the reciprocal value of the DC voltage.
The reference for the current controller is taken from the voltage controller. A modified PI-controller was chosen; special algorithms
are implemented to cope with the saturation problem of the output transformer. The output of the voltage controller is limited to the current capability of the devices.
Fig. 3: Control scheme of UPS output inverter
A sine generator running at a programmable frequency and amplitude produces the reference for the output voltage. An additional
voltage controller monitoring the RMS-value of the output voltage during an output cycle calculates the amplitude.
Universal Control Structure
It was decided to use only digital controllers in order to achieve stability, easy parameter adjustment and additional monitoring
features. Some of the controllers have to be very fast to gain best response (current control, output voltage control). For
implementing these algorithms fast signal processors and application specific integrated circuits (ASICs) are available. Signal
processors do not contain inverter specific peripheral circuitry like pulse width modulation, phase measurement etc. For these
functions, an ASIC was the solution with the best price performance ratio. Signalprocessors are optimized for digital filtering and not
for control algorithms. Integrating the control algorithms into the ASIC the calculation times could be minimized by developing a processor structure perfectly adapted to the application.
This ASIC containing both peripheral and signal processing hardware is a very cost-effective solution for this UPS system. The
disadvantage of having hardware red algorithms was acceptable due to the fixed specification of the UPS system and counterbalanced by an universal control structure performed by the ASIC with many switches and load able parameters.
All inner current and voltage control loops are performed with a sampling rate equivalent to the switching frequency of the power devices (10 or 20 kHz).
Output inverter and controlled rectifier both contain equivalent circuitry and signal processing pulse width modulator, current control,
sine-generation, DC-link measurement and adaptation. The whole UPS family consists of both one- and three-phase systems.
Integrating the total functions for a three-phase rectifier and inverter into one ASIC would be overloaded for single-phase applications.
Therefore it was decided to put the control of a three-phase inverter into one circuit. This can be used for the three-phase output inverter, the three-phase rectifier and also for both a one-phase rectifier and inverter.
Fig. 4: Universal control scheme of ASIC
Fig. 4 shows the universal control block diagram of the ASIC. It contains seven PI-controllers in total. The pulse width modulation
generates the signals for six inverter legs. This allows for three independent four-quadrant DC-inverters being used for a three-phase
output inverter. The current controllers operate in two modes: for the output inverter three current controllers are used to control the
three phases independently. For the rectifier only two controllers are used; the third phase is calculated at the output voltage level.
The voltage controllers are only used for output inverter operation. They can be bypassed at the rectifier mode.
Some additional circuitry was included. The measurement of the phase difference for the PLL-control of the line frequency is supported
by the ASIC using phase angle captures functions. To support the microcontroller to determine the effective output voltage and
current load the integrated squares of the measured values are calculated during a period of the sine wave frequency.
The repetition cycle of all calculations performed by the ASIC is the switching frequency of the inverter legs. This frequency normally
amounts to 20 kHz. At the beginning of the cycle the A/D-conversion is started. The ASIC calculates the references and the
UD-voltage controller. After at most 15 µs the A/D-conversion is ready and the calculation of the controllers starts being performed in
10 µs for all six PI-algorithms. New PWM-values are given to the modulator at the middle of the switching cycle. In the remaining second half of the cycle the ASIC performs the calculation of sum of squares of the measured values.
Measured Performance Results Of The UPS System
The inverter controller ASIC is used at the control board of a series of static UPS systems (APOSTAT). This series consists of
one-phase units with sinusoidal input currents (6.6 kVA and 10 kVA) and three-phase units (10 kVA and 20 kVA).
Fig. 5: UPS-system APOSTAT: 100% load step; 6.6 kVA/1~ unit and 20 kVA/3~ unit
Due to the high sampling rate of the digital control algorithms an excellent dynamic behavior of the UPS-system is achieved. This is
important in case of load-steps (Fig. 5) and non-linear loads (Fig. 6). The output inverter and the output filter circuit provide high peak
currents (crest factor 3). Harmonic distortions of the output voltages range from 1% to 2% at linear loads and to 5% at non-linear loads.
Using a controlled step-up chopper the input currents of the single-phase controlled rectifiers are pure sinusoidal. This transforms non-linear loads at the output side into linear resistive loads at the line-side (Fig. 6).
Fig. 6: UPS-system APOSTAT 6.6 kVA/50 Hz (single phase) with sinusoidal
input current and a mixed resistive non-linear load
The output transformer of the three phase units consists of three individually controlled single-phase transformers. Therefore voltage
distortions of one phase resulting from the load (for example short circuit) do not affect the other phases. Fig. 7 demonstrates the inverter being capable of clearing the short circuit by blowing the fuse without transferring to bypass operation. The maximum peak
current available of the inverter during this operation is 300% of RMS-rating. If the output voltage exceeds the allowed voltage range for more than 4 ms the system automatically switches from inverter to bypass operation.
Fig. 7: APOSTAT 20 kVA/3~: Single phase short circuit of the load (4 A-Fuse) at 100% rated load
without transfer to bypass operation
The inverter is able to provide short time overloads (20%/100 ms, 1500%/5 sec, 120%/1min). If the load exceeds the current or time
limit a current controller reduces output currents and voltages. Fig. 8 shows that the bypass will be activated to supply the output
Fig. 8: APOSTAT 20kVA/3~ load step from 100% to 200% with succeeding transfer to bypass
operation after approx. 100 ms
For the complete digital control of an UPS system an ASIC was designed performing the fast current and voltage control loops. Using
this ASIC the UPS system achieves an excellent dynamic behavior (fast step response, low harmonic distortions even at non-linear
loads). The application specific integration of peripheral functions and control algorithms proved to be a very efficient way for implementing a digital inverter control.
A more detailed description of this work you can find in following publication done together with the Anton Piller GmbH & Co. KG:
Kiel, E.; Schumacher, W.; Ehrenberg, J.; Letas, H.-H.; Schrader-Hausmann, U.:
High Performance Digital Control of uninterruptible Power Supply (UPS) using an Application Specific Integrated Circuit (ASIC).
Proceedings of EPE-Conference, Florence 1991